Photo by Tester051005, Wikimedia Commons, CC BY-SA 4.0
IIT Madras kicked off the 3rd Digital India RISC-V (DIR-V) Symposium 2026 at its Research Park in Chennai on Saturday, August 1, with the event set to run through August 2, 2026.
The symposium is being held in partnership with the Ministry of Electronics and Information Technology (MeitY) and RISC-V International, bringing together policymakers, technology experts, researchers, startups, investors, faculty and students from across the country.
This year’s theme, ‘Empowering Bharat’s Semiconductor Future,’ spans indigenous processor technologies, secure computing systems, hardware innovation, artificial intelligence and the expanding RISC-V ecosystem in India.
The programme features keynote addresses, technical sessions, panel discussions, hands-on workshops, technology demonstrations, exhibitions and startup showcases, along with the DIR-V Grand Challenge Hackathon highlighting student and startup projects built on RISC-V.
Registrations for physical attendance closed on July 26, 2026, once the venue reached full capacity, though the symposium is being live-streamed on YouTube and requires no registration to watch.
As an open-standard instruction set architecture free of licensing costs, RISC-V has become central to India’s efforts to build domestic chip design expertise and reduce dependence on imported processors.
IIT Madras Research Park, the venue for this year’s symposium, has emerged as a hub for deep-tech startups working on hardware, semiconductors and embedded systems in the country.
Previous editions of the DIR-V symposium have drawn participation from chip designers, academic researchers and government officials, reflecting the event’s role as a meeting point for India’s RISC-V ecosystem.
MeitY has separately backed the development of indigenous RISC-V-based processors under its Digital India programme, part of a broader effort to build chip design capability alongside manufacturing incentives.
The Chennai event follows two earlier editions of the DIR-V symposium, each of which expanded in scale as more startups, research institutions and global chip companies engaged with India’s RISC-V initiatives.
RISC-V is an open-standard instruction set architecture that has drawn growing interest from chipmakers worldwide because, unlike proprietary architectures, it can be used and modified without licensing fees.
Photo by Tester051005, Wikimedia Commons, CC BY-SA 4.0
